Processor controlled telephone systems are of course well-known. In these systems, at least two central processors are generally provided. In some of these systems such as U.S. Pat. No. 3,557,315 to Kobus et al., the two central processors share the call load on a continuous basis. In other systems, such as the Bell System ESS-1 as shown by U.S. Pat. No. 3,570,008 to Downing et al., the two central processors operate in a synchronized arrangement. The present system falls into the latter category i.e., active-standby.
Telecommunications systems using time division switching are also well-known in the art. For example, see U.S. Pat. No. 3,937,892 to A. Block et al. Within such systems, the subdivision of timing slots for usage is shown in U.S. Pat. No. 3,991,276 to A. Regnier et al. U.S. Pat. No. 3,941,936 issued Mar. 2, 1976 to Graham et al. discloses another time division controlled system with some similarities to the present system.
Since the advent of microprocessors, distributed processor technology has been developed for computer systems. With distributed processors, much of the complex and expensive control function can be performed on a more localized base lessening the system cost.